In a circuit arrangement, e.g. an integrated circuit (IC) formed in a semiconductor substrate, e.g. in an n-doped substrate, a capacitor, e.g. a blocking capacitor, may be integrated, e.g. a capacitor for blocking a high frequency (HF) signal, e.g. a metal-insulator-semiconductor capacitor (MISCAP, wherein “metal” may not strictly be a metal, but any conductive material, e.g. a doped semiconductor, e.g. a degenerate semiconductor). The capacitor, e.g. blocking capacitor, may be formed with its electrodes essentially parallel to a main surface of the semiconductor substrate. A top electrode of the capacitor may thus be accessible, but a bottom electrode may be buried underneath the top electrode, and a separate contact for connecting the bottom electrode may need to be formed. Furthermore, the separate contact may need to be electrically connected to ground. Typically, this may have been achieved by means of a doped region that may be arranged laterally next to the top electrode of the capacitor. The doped region may be electrically connected with the bottom electrode. The doped region may furthermore be electrically connected to ground, for example externally connected, e.g. across a surface of the semiconductor. Such a contacting scheme for the bottom electrode may cause serial resistances and serial inductivities, which may be disadvantageous in a blocking capacitor.